• Create and test FPGA plans with high complexity
  • Manage and develop current FPGA designs in Xilinx environment
  • Cooperate with software / hardware teams in interface settings
  • Collect high-speed data in FPGA, provide lead through line/slow/fast speed ports
  • Continuous time analysis, date sheet / date code maintenance
  • 1-3 years of experience in high-complexity FPGA planning and design, Xilinx or Altera environment background is a big advantage
  • VHDL based RTL development experience is preferred
  • Deep understanding of FPGA system, implementation
  • Version control system knowledge: SVN or Git
  • "FPGA thinking", good problem solving skills
  • Big advantage: high-speed interface using experience in FPGA, integrated or soft-processor using experience
  • Intermediate level English skills (both oral and written)
  • Opportunity to use market leader high-end technologies
  • Career opportunities
  • High performance high speed data management systems

Budapest
Filling in the online registration form and uploadig CV via the Randstad website
Gergely Makai
gergely.makai@randstad.hu
HASONLÓ ÁLLÁSOK
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